广西师范大学学报（自然科学版） ›› 2024, Vol. 42 ›› Issue (5): 52-60.doi: 10.16088/j.issn.1001-6600.2023101304

• 研究论文 • 上一篇    下一篇

基于开关电容的差分无源N通道滤波器

刘畅平1,2,3, 宋树祥1,2,3*, 蒋品群1,2,3, 岑明灿1,2,3   

  1. 1.广西师范大学 电子与信息工程学院/集成电路学院, 广西 桂林 541004;
    2.广西高校集成电路与微系统重点实验室(广西师范大学),广西 桂林 541004;
    3.广西类脑计算与智能芯片重点实验室(广西师范大学),广西 桂林 541004
  • 收稿日期:2023-10-13 修回日期:2023-12-04 出版日期:2024-09-25 发布日期:2024-10-11
  • 通讯作者: 宋树祥(1970—),男,湖南双峰人,广西师范大学教授,博导。E-mail:songshuxiang@gxnu.edu.cn
  • 基金资助:
    国家自然科学基金(62061005);广西高校中青年教师科研基础能力提升项目(2020KY02028)

Differential Passive N-path Filter Based on Switched Capacitors

LIU Changping1,2,3, SONG Shuxiang1,2,3*, JIANG Pinqun1,2,3, CEN Mingcan1,2,3   

  1. 1. School of Electronics and Information Engineering/School of Integrated Circuits, Guangxi Normal University, Guilin Guangxi 541004, China;
    2. Key Laboratory of Integrated Circuits and Microsystems(Guangxi Normal University), Education Department of Guangxi Zhuang Autonomous Region, Guilin Guangxi 541004, China;
    3. Guangxi Key Laboratory of Brain-inspired Computing and Intelligent Chips(Guangxi Normal University), Guilin Guangxi 541004, China
  • Received:2023-10-13 Revised:2023-12-04 Online:2024-09-25 Published:2024-10-11

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摘要： 针对传统N通道滤波器不能抑制谐波、谐波混叠且具有一定插入损耗的问题,本文设计一款基于开关电容的差分无源N通道滤波器。该滤波器使用不同容值的电容加权多相信号来消除奇次谐波,利用不同时钟信号叠加的原理抑制谐波混叠,同时,采用电容堆叠技术提供一定的增益减小插入损耗。滤波器采用TSMC 40 nm CMOS工艺,Cadence Spectre RF软件仿真结果表明:该滤波器的中心频率fs可调范围为0.3～1.5 GHz,当fs=500 MHz时,对3次和5次谐波均有48 dB以上的抑制效果,对最强谐波混叠抑制达到60 dB以上,且没有插入损耗,噪声系数(NF)为2.5～2.8 dB,线性度(IIP3)在15 dBm以上。

关键词: N通道滤波器, 谐波抑制, 谐波混叠, 无源, 差分结构

Abstract: A differential passive N-path filter based on switching capacitors is designed to address the issue that traditional N-path filters are unable to suppress harmonics and harmonic aliasing,and have certain insertion losses. This filter eliminates odd harmonics by using capacitance weighted multiphase signals with different capacitance values,suppresses harmonic aliasing by combining different clock signals,and uses capacitance stacking technology to provide certain gain and reduce insertion loss. The filter adopts TSMC 40 nm CMOS process,and the simulation results show that the center frequency fs of the filter can be adjusted from 0.3-1.5 GHz,and the rejection effect of fs=500 MHz is more than 48 dB for the 3rd and 5th harmonics,and the suppression of the most powerful harmonic folding reaches more than 60 dB,and there is no insertion loss,the noise figure (NF) is 2.5-2.8 dB,and the linearity (IIP3) is above 15 dBm.

Key words: N-path filter, harmonic rejection, harmonic folding, passive, differential structure

中图分类号:  TN713

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[1] 钟辉, 宋树祥, 岑明灿, 蔡超波, 蒋品群, 刘振宇. 基于采样计算的差分N通道滤波器[J]. 广西师范大学学报（自然科学版）, 2022, 40(4): 58-67.
[2] 蒋品群, 顾燊, 宋树祥, 岑明灿. N通道带阻滤波器谐波分析与抗混叠研究[J]. 广西师范大学学报（自然科学版）, 2021, 39(2): 81-89.
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