Journal of Guangxi Normal University(Natural Science Edition) ›› 2016, Vol. 34 ›› Issue (1): 32-37.doi: 10.16088/j.issn.1001-6600.2016.01.005

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A 10bit High Speed Two-levels Single-slope ADC

ZHANG Na1, JIN Tao2   

  1. 1.College of Information Science and Engineering,Ocean University of China,Qingdao Shandong 266100,China;
    2.College of Mechanical &Electrical Engineering,China University of Petroleum,Qingdao Shandong 266580,China
  • Received:2015-05-15 Published:2018-09-14

Abstract: A design of highspeedcolumn parallel two-levels single-slope ADC for CMOS image sensor is presented. The signal is converted by two sub division and subtraction operation using two ramp generators. With the pipelined operation mode,the conversion speed is 12 times higher than that of the conventional single slope ADC. The ADC achieves 10 bit accuracy and 263 ks/s high conversion rate with 0.18μm process. The DNL,INL,SNR,ENOB of the ADC are +0.83/-0.82 LSB,+0.51/-1.5 LSB,58.28 dB and 9.3 bit respectively.

Key words: single-slope, column parallel, analog-to-digital converter, subtractor

CLC Number: 

  • TN402
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